Due to aggressive process scaling, the raw bit error rate (BER) of NAND flash is becoming poorer and poorer. To maintain the same level of reliability, solid state drive (SSD) controllers are adopting error correction codes with soft decoding capability. For example, low density parity check (LDPC) codes have soft decoding capability. Error correction codes with soft decoding capability are more powerful in correcting errors but they use a soft input to the decoder. The soft input is in the form of a log likelihood ratio (LLR). Since conventional flash devices do not provide soft decision outputs, SSD controllers have to generate them using either hardware or software. LLR values are real values ranging from −Inf to +Inf. Once LLRs are generated, there is a practical problem of converting LLRs to fixed point numbers before decoding.
It would be desirable to implement fixed point conversion of LLR values based on correlation in a SSD controller and/or drive.